3rd Gen Xeon SP is up to 1.5x faster than the competition. 40 cores and improved memory/cache

Intel will hold a press conference from 8:00 on April 6 (US time) to announce the 1-2 socket version of the 3rd generation Xeon Scalable Processors (hereinafter referred to as 3rd generation Xeon SP) for data centers. announced. This product, which has been called by the development codename "Ice Lake" or "Ice Lake-SP", is the first product for the company's data center to be miniaturized to the 10nm process rule.

Competitor AMD released the first EPYC based on the Zen microarchitecture in 2017. In 2019, it introduced the Zen 2-based 2nd generation EPYC manufactured at 7nm, surpassing Intel in the generation of manufacturing process rules for the first time in history, and is gradually expanding its market share.

Furthermore, in March, they released the 3rd generation EPYC, which evolved the microarchitecture to Zen 3, and are preparing to catch up with Intel. Under such circumstances, the company's counter is the 3rd generation Xeon SP this time.

Looking at the details of the 3rd generation Xeon SP, while increasing the number of CPU cores from 28 cores in the previous product to 40 cores, while maintaining a monolithic die structure with one large die in the package, cache and We can see a design that optimizes the memory and improves the performance of the entire package. At the same time, by introducing the new instruction set of AVX512, the performance at the time of encryption and decryption is also greatly improved.

In this report, I would like to explain the internal architecture of the 3rd generation Xeon SP and its performance. According to Intel, it delivers up to 1.5 times the performance of deep learning/machine learning inference compared to the 3rd generation EPYC.